Circuit design for a high-T/sub c/ Josephson sampler

@article{Hidaka1995CircuitDF,
  title={Circuit design for a high-T/sub c/ Josephson sampler},
  author={Mutsuo Hidaka and J. S. Tsai},
  journal={IEEE Transactions on Applied Superconductivity},
  year={1995},
  volume={5},
  pages={3353-3356}
}
We propose a high-speed and high-sensitivity sampler circuit using high T/sub c/ superconducting (HTS) Josephson junctions. This circuit consists of five non-latching junctions, superconducting lines and a superconducting ground-plane. A main feature of this circuit is a non-latching comparator junction whose switching generates a circulating current in a superconducting loop. Computer simulation and prototype layout were performed to study its ability and feasibility.<<ETX>> 

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Recent Progress in SFQ Device Technologies in Japan

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