Circuit design and modeling for soft errors

@article{KleinOsowski2008CircuitDA,
  title={Circuit design and modeling for soft errors},
  author={A. KleinOsowski and E. Cannon and P. Oldiges and L. Wissel},
  journal={IBM J. Res. Dev.},
  year={2008},
  volume={52},
  pages={255-264}
}
As semiconductor devices decrease in size, soft errors are becoming a major issue that must be addressed at all stages of product definition. Even before prototype silicon chips are available for measuring, modeling must be able to predict soft-error rates with reasonable accuracy. As the technology matures, circuit test sites are produced and experimentally tested to determine representative fail rates of critical SRAM and flip-flop circuits. Circuit models are then fit to these experimental… Expand
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