Circuit Techniques for Large CSEA SRAM ’ S


The CMOS-storage emitter-access (CSEA) memory cell offers faster access than the MOS cells used in conventional BiCMOS SRAM’S, but using it in large memory arrays poses several problems. This paper describes novel BiCMOS circuit approaches to address the problems of decoding power, electronic noise, level translation, and write disturbance. It also reports… (More)


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@inproceedings{SRAMS1998CircuitTF, title={Circuit Techniques for Large CSEA SRAM ’ S}, author={CSEA SRAM’S and Drew Wingard}, year={1998} }