Corpus ID: 17641247

Circuit Optimization and Design Automation Techniques for Low Power CMOS VLSI Design : A Review

@inproceedings{Patil2015CircuitOA,
  title={Circuit Optimization and Design Automation Techniques for Low Power CMOS VLSI Design : A Review},
  author={S. Patil},
  year={2015}
}
  • S. Patil
  • Published 2015
    • Reports indicate that 40% or even higher percentage of the total power consumption is due to the leakage of transistors. This percentage will increase with technology scaling unless effective techniques are introduced to bring leakage under control. This paper focuses on circuit optimization and design automation techniques to accomplish this goal. The first part of the paper provides an overview of main sources of leakage current in CMOS transistor. The second part of the paper describes a… CONTINUE READING
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    2x2 Matrix Multiplication with 4-Bit elements in 45nm CMOS Technology

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