Chip Power Model - A New Methodology for System Power Integrity Analysis and Design

@article{Kulali2007ChipPM,
  title={Chip Power Model - A New Methodology for System Power Integrity Analysis and Design},
  author={Emre Kulali and Evgeny Wasserman and Ji Hui Zheng},
  journal={2007 IEEE Electrical Performance of Electronic Packaging},
  year={2007},
  pages={259-262}
}
A compact SPICE equivalent circuit model of full-chip power network is proposed in this paper to address the system power integrity co-design and optimization. The theory and procedures for the generation of the compact chip power model is described. The accuracy validation of the chip power model is also presented. 

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