Characterization of Total Safe Operating Area of Lateral DMOS Transistors

  title={Characterization of Total Safe Operating Area of Lateral DMOS Transistors},
  author={Peter Moens and Geert Van den bosch},
  journal={IEEE Transactions on Device and Materials Reliability},
The total safe operating area (SOA) of LDMOS transistors is discussed. It is shown that the transistors are subjected to different kinds of stresses, yielding a combination of electrical and thermal degradation and/or failure modes. A methodology to build the total SOA for LDMOS transistors is highlighted and is experimentally verified on a 40-V LDMOS implemented in a 
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