Characteristic Degradation of Poly-Si Thin-Film Transistors With Large Grains From the Viewpoint of Grain Boundary Location

Abstract

The characteristic degradation of poly-Si thin-film transistors (TFTs) with large grains has been analyzed from the viewpoint of grain boundary location. Only when the grain boundary is located near the drain junction during bias stress, trap states are generated there due to the hot carriers, and the TFTs are severely degraded. Moreover, in the linear… (More)

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