Capacitance estimation for InAs Tunnel FETs by means of full-quantum k·p simulation

@article{Baravelli2014CapacitanceEF,
  title={Capacitance estimation for InAs Tunnel FETs by means of full-quantum k·p simulation},
  author={Emanuele Baravelli and E.. Gnani and A. Gnudi and S.. Reggiani and G.. Baccarani},
  journal={2014 15th International Conference on Ultimate Integration on Silicon (ULIS)},
  year={2014},
  pages={17-20}
}
We report for the first time a quantum mechanical simulation study of gate capacitance components in aggressively scaled InAs Tunnel Field-Effect Transistor (TFET) nanowires. It will be shown that the gate-drain capacitance follows the same trend as the total gate capacitance (but with smaller values) over the whole Vgs range, hence confirming the capacitance estimation provided by semiclassical TCAD tools from a qualitative point of view. However, we find that the gate capacitance exhibits a… CONTINUE READING