Cache QoS: From concept to reality in the Intel® Xeon® processor E5-2600 v3 product family

@article{Herdrich2016CacheQF,
  title={Cache QoS: From concept to reality in the Intel® Xeon® processor E5-2600 v3 product family},
  author={Andrew Herdrich and Edwin Verplanke and Priya Autee and Ramesh Illikkal and Chris Gianos and Ronak Singhal and Ravi Iyer},
  journal={2016 IEEE International Symposium on High Performance Computer Architecture (HPCA)},
  year={2016},
  pages={657-668}
}
Over the last decade, addressing quality of service (QoS) in multi-core server platforms has been growing research topic. QoS techniques have been proposed to address the shared resource contention between co-running applications or virtual machines in servers and thereby provide better isolation, performance determinism and potentially improve overall throughput. One of the most important shared resources is cache space. Most proposals for addressing shared cache contention are based on… CONTINUE READING
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A case for integrated processor-cache partitioning in chip multiprocessors

  • S. Srikantaiah
  • SC ’09,
  • 2009
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