CMOS implementation of a current conveyor-based field-programmable analog array

@article{Gaudet1997CMOSIO,
  title={CMOS implementation of a current conveyor-based field-programmable analog array},
  author={V. Gaudet and P. Glenn Gulak},
  journal={Conference Record of the Thirty-First Asilomar Conference on Signals, Systems and Computers (Cat. No.97CB36136)},
  year={1997},
  volume={2},
  pages={1156-1159 vol.2}
}
To date, all published CMOS field-programmable analog array (FPAA) designs have operated under 1 MHz bandwidths. This paper develops circuit methods allowing the development of a CMOS FPAA operating at greater than 1 MHz frequencies. For this purpose the second-generation current conveyor (CCII) is used. IC test results of a 0.8 /spl mu/m CMOS chip containing four configurable analog blocks (CABs) based on the CCII, as well as an interconnection network based on transmission gates, are… CONTINUE READING
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