CMOS dynamic comparators for pipeline A/D converters

@inproceedings{Sumanen2002CMOSDC,
  title={CMOS dynamic comparators for pipeline A/D converters},
  author={Lauri Sumanen and Mikko Waltari and V{\"a}in{\"o} Hakkarainen and Kari Halonen},
  booktitle={ISCAS},
  year={2002}
}
Three different CMOS dynamic comparator topologies for pipeline AID converters, resistive divider, differential pair, and charge distribution comparators, are analyzed. The topologies considered are fully differential, i.e. both sensing and reference voltage inputs are balanced, consist only of a single stage, and feature zero DC power dissipation with a built-in threshold adjusting input stage. Test structures of the comparators, fabricated in 0.35-pm CMOS process, are measured to determine… CONTINUE READING
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K. Halonen M. Waltari
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