C.2 Address Traces

  • Bunda, Fussell D, +16 authors Sze S M
  • Published 2007


[30] Rowen C., " MIPS R4200, an innovation in low-power microprocessor design " , presentation at Microprocessor Forum Europe, May 1993. [22] Paver et. al., " Register locking in an asynchronous microprocessor " , [25] Martin et. al., " The design of an asynchronous microporocessor " , [29] van Berkel et. al., " The VLSI-programming language Tangram and its translation into handshake circuits " , proc. References [1] van Berkel K., personal communication, August 1993, and unpublished comments at the presentation of " VLSI programming of a mod-ulo-N counter with contant response time " , proc. [5] Jouppi et. al., " A 300MHz 115W 32b Bipolar ECL Microprocessor " , For the memory access pattern analysis in section A.2, a set of three address traces was used. These traces were supplied on the tape accompanying Hennessy and Patterson's book [7]. The three traces were obtained from the following programs: cc1. The main part of the GCC compiler. spice. The circuit simulation program. tex. The text formatting program. The total number of data memory accesses in each file is around 200 000-250 000. Unfortunately the compiler used, the input data supplied to the programs and the period of execution that was monitored are not known.

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Cite this paper

@inproceedings{Bunda2007C2AT, title={C.2 Address Traces}, author={Bunda and Fussell D and Jenevin R and Spirn and Thiebaut D and Wolf J L and Stone H S and Usher and Katevenis and Al and Furber and Mead C and Conway L and Linden D and Weste N H E and Eshraghian K and Hennessy J L Patterson and Hamburgen W R Fitch and Sze S M}, year={2007} }