• Corpus ID: 60914344

Bus and cache memory organizations for multiprocessors

@inproceedings{Winsor1989BusAC,
  title={Bus and cache memory organizations for multiprocessors},
  author={Donald C. Winsor},
  year={1989}
}
The single shared bus multiprocessor has been the most commercially successful multiprocessor system design up to this time, largely because it permits the implementation of efficient hardware mechanisms to enforce cache consistency. Electrical loading problems and restricted bandwidth of the shared bus have been the most limiting factors in these systems. This dissertation presents designs for logical buses constructed from a hierarchy of physical buses that will allow snooping cache… 
2 Citations

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