Burst Error Detection Hybrid ARQ with Crosstalk-Delay Reduction for Reliable On-chip Interconnects

@article{Fu2009BurstED,
  title={Burst Error Detection Hybrid ARQ with Crosstalk-Delay Reduction for Reliable On-chip Interconnects},
  author={Bo Fu and Paul Ampadu},
  journal={2009 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems},
  year={2009},
  pages={440-448}
}
We present a hybrid ARQ (HARQ) scheme using single-error correcting burst-error detecting (SEC-BED) codes to address multiple errors in nanoscale on-chip interconnects. For a given residual flit error rate requirement, the proposed HARQ method yields 20% energy improvement over other burst error correction schemes. By further integrated with skewed transitions, the proposed HARQ method can efficiently improve the error resilience against burst errors and also reduce delay uncertainty caused by… CONTINUE READING

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  • For a given residual flit error rate requirement, the proposed HARQ method yields 20% energy improvement over other burst error correction schemes.

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