Buried p-layer SAINT for very high-speed GaAs LSI's with submicrometer gate length

@article{Yamasaki1985BuriedPS,
  title={Buried p-layer SAINT for very high-speed GaAs LSI's with submicrometer gate length},
  author={K. Yamasaki and Noboru Kato and Masaaki Hirayama},
  journal={IEEE Transactions on Electron Devices},
  year={1985},
  volume={32},
  pages={2420-2425}
}
A new SAINT FET with a depleted p-layer buried under the active layer has been developed in order to make very high-speed GaAs LSI's with submicrometer gate lengths. The p-layer design has successfully suppressed the substrate current that causes the serious short-channel effects in an n+self-aligned (SAINT) MESFET. Since the whole p-layer, formed by Be ion… CONTINUE READING