Briefs Application of a Floating Well Concept to a Latch - up - Free , Low - Cost , Smart Power High - Side Switch Technology

Abstract

The aim of this brief is to present an original design methodology that permits implementing latch-up-free smart power circuits on a very simple, cost-effective technology. The basic concept used for this purpose is letting float the wells of the MOS transistors most susceptible to initiate latch-up.

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Cite this paper

@inproceedings{Bafleur2009BriefsAO, title={Briefs Application of a Floating Well Concept to a Latch - up - Free , Low - Cost , Smart Power High - Side Switch Technology}, author={Marise Bafleur and Josep Bux{\'o} and Mathieu Vidal and P. Givelin and V . Macary and G{\'e}rard Sarrabayrouse}, year={2009} }