Brief Announcement: Fast Shared Counting using (O(n)) Compare-and-Swap Registers

Abstract

We consider the problem of building a wait-free and linearizable counter using shared registers. The counter supports a read operation, which returns the value of the counter, and an increment operation, which increments the value of the counter and returns nothing. The shared registers support read, write and compare-andswap instructions. We show that given n processes andO(n) shared registers, the increment operation is inO(logn) and read operation is in O(1).

DOI: 10.1145/3087801.3087841

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Cite this paper

@inproceedings{Khanchandani2017BriefAF, title={Brief Announcement: Fast Shared Counting using (O(n)) Compare-and-Swap Registers}, author={Pankaj Khanchandani and Roger Wattenhofer}, booktitle={PODC}, year={2017} }