Bounded Model Checking of Analog and Mixed-Signal Circuits Using an SMT Solver

@inproceedings{Walter2007BoundedMC,
  title={Bounded Model Checking of Analog and Mixed-Signal Circuits Using an SMT Solver},
  author={David Walter and Scott Little and Chris J. Myers},
  booktitle={ATVA},
  year={2007}
}
This paper presents a bounded model checking algorithm for the verification of analog and mixed-signal (AMS) circuits using a satisfiability modulo theories (SMT) solver. The systems are modeled in VHDL-AMS, a hardware description language for AMS circuits. In this model, system safety properties are specified as assertion statements. The VHDL-AMS description is compiled into labeled hybrid Petri nets (LHPNs) in which analog values are modeled as continuous variables that can change at rates in… CONTINUE READING
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