# Binary Decision Diagrams

@article{Akers1978BinaryDD, title={Binary Decision Diagrams}, author={Sheldon B. Akers}, journal={IEEE Transactions on Computers}, year={1978}, volume={C-27}, pages={509-516} }

This paper describes a method for defining, analyzing, testing, and implementing large digital functions by means of a binary decision diagram. This diagram provides a complete, concise, "implementation-free" description of the digital functions involved. Methods are described for deriving these diagrams and examples are given for a number of basic combinational and sequential devices. Techniques are then outlined for using the diagrams to analyze the functions involved, for test generation…

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## 1,420 Citations

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This paper outlines an enhanced variable ordering algorithm which shall be capable to produce the minimum number of nodes for a given Reduced Ordered Binary Decision Diagrams (ROBDD).

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A tighter bound on the size of an ordered BDD that can be computed from a given Boolean circuit is presented and a case is made for exploring the use of repeated BDDs, with a small number of repeated variables, and free BDD's for some applications for which only ordered B DDs have been used so far.

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Algorithms and a computer-aided design tool for technology mapping of both completely specified and incompletely specified logic networks are introduced and a novel matching algorithm, using ordered binary decision diagrams, is described.

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