Behavioral-level fault simulation

  title={Behavioral-level fault simulation},
  author={Souragni Ghosh},
  journal={IEEE Design & Test of Computers},
An approach to fault simulation is presented in which behavioral fault models represent complex failures in VLSI designs. Errors are deliberately introduced into the description of a design that contains no faults. These errors can be fault values of variables that represent state or timing parameters, a faulty description that is substituted for part of the good description, or a combination of these. The algorithm guarantees accurate results by deferring the output assignments. The approach… CONTINUE READING
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