Behavioral Simulation of Fractional-N Frequency Synthesizers and Other PLL Circuits

@article{Perrott2002BehavioralSO,
  title={Behavioral Simulation of Fractional-N Frequency Synthesizers and Other PLL Circuits},
  author={Michael H. Perrott},
  journal={IEEE Design & Test of Computers},
  year={2002},
  volume={19},
  pages={74-83}
}
Two techniques are presented that allow fast and accurate simulation of fractional-N synthesizers. A uniform time step allows implementation of these techniques in various simulation frameworks, such as Verilog, Matlab, and C or C++ programs. The techniques are also applicable to the simulation of other PLL systems, such as clock and data recovery circuits. 

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