BIST Analyzer: a Training Platform for SoC Testing

Abstract

1 Artur Jutman, Tallinn University of Technology, Department of Computer Engineering, Raja 15, Tallinn 12618, Estonia, artur@pld.ttu.ee Anton Tsertov, Tallinn University of Technology, Department of Computer Engineering, Raja 15, Tallinn 12618, Estonia, antonchertov@gmail.com Anton Tsepurov, Tallinn University of Technology, Department of Computer Engineering, Raja 15, Tallinn 12618, Estonia, anton.chepurov@gmail.com Igor Aleksejev, Tallinn University of Technology, Department of Computer Engineering, Raja 15, Tallinn 12618, Estonia, aleksejev.igor@gmail.com Raimund Ubar, Tallinn University of Technology, Department of Computer Engineering, Raja 15, Tallinn 12618, Estonia, raiub@pld.ttu.ee 2 Heinz-Dietrich Wuttke, Ilmenau Technical University, Faculty of Informatics and Automation, PO box 100565, D-98684 Ilmenau, wuttke@.tu-ilmenau.de Abstract Linear Feedback Shift Registers (LFSR) and other Pseudo-Random Pattern Generators (PRPG) have become one of the central elements used in testing and self testing of contemporary complex electronic systems like processors, controllers, and high-performance integrated circuits. The current paper describes a training and research tool for learning basic and advanced issues related to PRPG-based test pattern generation. Unlike other similar systems, this tool facilitates study of various test optimization problems, allows fault coverage analysis for different circuits and with different LFSR parameters. The main didactic aim of the tool is presenting complicated concepts in a comprehensive graphical and analytical way. The multi-platform JAVA runtime environment allows for easy access and usage of the tool both in a classroom and at home. The BIST Analyzer represents an integrated simulation, training, and research environment that supports both analytic and synthetic way of learning. Due to the above mentioned facts the tool provides a unique training platform to use in courses on electronic testing and design for testability. The BIST Analyzer has got a positive feedback from students of Darmstadt TU (Germany) and Tallinn TU (Estonia).

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Cite this paper

@inproceedings{Ubar2007BISTAA, title={BIST Analyzer: a Training Platform for SoC Testing}, author={Raimund Ubar}, year={2007} }