BIRA With Optimal Repair Rate Using Fault-Free Memory Region for Area Reduction

@article{Oh2017BIRAWO,
  title={BIRA With Optimal Repair Rate Using Fault-Free Memory Region for Area Reduction},
  author={Chang-Hyun Oh and Sae-Eun Kim and Joon-Sung Yang},
  journal={IEEE Transactions on Circuits and Systems I: Regular Papers},
  year={2017},
  volume={64},
  pages={3160-3171}
}
As manufacturing process technology scales down, memory capacity and density continue to grow. As the number of memory cells per area increases, so does the possibility of having defects in the memory cells. Therefore, built-in redundancy analysis (BIRA) is widely used for memory test and repair. BIRA repairs faulty cells by replacing them with healthy… CONTINUE READING