Automatic test generation for verifying microprocessors

  title={Automatic test generation for verifying microprocessors},
  author={Fulvio Corno and E. Sanchez and M. Sonza Reorda and Giovanni Squillero},
  journal={IEEE Potentials},
A pipelined processor with a high-level behavioral HDL description is presented in this paper. It generates a set of effective test programs by using a simulator, which is able to evaluate with respect to an RTL coverage metric. The proposed optimizer is based on a technique called microGP, an evolutionary system able to automatically device and optimizes the program written in an assembly language. Quantitative coverage measurement presented will guide the test-program generation. The approach… CONTINUE READING


Publications citing this paper.

Similar Papers

Loading similar papers…