Automatic generation of synthetic sequential benchmark circuits

  title={Automatic generation of synthetic sequential benchmark circuits},
  author={Mike Hutton and Jonathan Rose and Derek G. Corneil},
  journal={IEEE Trans. on CAD of Integrated Circuits and Systems},
The design of programmable logic architectures and supporting computer-aided design tools fundamentally requires both a good understanding of the combinatorial nature of netlist graphs and sufficient quantities of realistic examples to evaluate or benchmark the results. In this paper, the authors investigate these two issues. They introduce an abstract model for describing sequential circuits and a collection of statistical parameters for better understanding the nature of circuits. Based upon… CONTINUE READING
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