Automatic generation of identical routing pairs for FPGA implemented DPL logic

@article{He2012AutomaticGO,
  title={Automatic generation of identical routing pairs for FPGA implemented DPL logic},
  author={Wei He and Andr{\'e}s Otero and Eduardo de la Torre and Teresa Riesgo},
  journal={2012 International Conference on Reconfigurable Computing and FPGAs},
  year={2012},
  pages={1-6}
}
Side Channel Attacks (SCAs) typically gather unintentional (side channel) physical leakages from running crypto-devices to reveal confidential data. Dual-rail Precharge Logic (DPL) is one of the most efficient countermeasures against power or EM side channel threats. This logic relies on the implementation of complementary rails to counterbalance the data… CONTINUE READING