Automatic delay calibration method for multi-channel CMOS formatter

Abstract

This work describes the technique used for automatically calibrating vernier delay steps in Credence CMOS formatter-RIC/DICMOS. Embedded within the timing generation IC, RIC/DICMOS provides formatted levels and internal strobe markers for eight independent pin-electronics channels at up to 800 Mbps with +/-81 ps accuracy. Utilizing the on-chip, run-time… (More)
DOI: 10.1109/ITC.2004.40

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@article{Syed2004AutomaticDC, title={Automatic delay calibration method for multi-channel CMOS formatter}, author={Ahmed Rashid Syed}, journal={2004 International Conferce on Test}, year={2004}, pages={577-586} }