Automatic Verification of Timed Circuits

  title={Automatic Verification of Timed Circuits},
  author={Tomas Rokicki and Chris J. Myers},
This paper presents a new formalism and a new algorithm for verifying timed circuits. The formalism, called orbital nets, allows hierarchical verification based on a behavioral semantics of timed trace theory. We present improvements to a geometric timing algorithm that take advantage of concurrency by using partial orders to reduce the time and space requirements of verification. This algorithm has been fully automated and incorporated into a design system for timed circuits, and experimental… CONTINUE READING
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