Automatic Construction of Runtime Monitors for FPGA Based Designs

@article{Sawhney2011AutomaticCO,
  title={Automatic Construction of Runtime Monitors for FPGA Based Designs},
  author={Pratibha Sawhney and Gautam Ganesh and Amitab Bhattacharjee},
  journal={2011 International Symposium on Electronic System Design},
  year={2011},
  pages={164-169}
}
The failure of a hardware design may be catastrophic if there is a bug that exhibits during runtime. Such bugs may remain in the implementation due to shortfall in conventional testing and are referred to as corner case bugs. Runtime monitoring of hardware designs used in critical systems is required to take care of corner case bugs. The basic idea behind runtime monitoring is to identify certain critical design invariants and write assertions, which monitor these invariants during runtime… CONTINUE READING

Citations

Publications citing this paper.
Showing 1-4 of 4 extracted citations

References

Publications referenced by this paper.
Showing 1-8 of 8 references

Optimized Algorithms for Dynamic Verification

Dmitry Pidan, Sharon Keidar-Barner, Mark Moulin, Dana Fisman
Property Based System Design (PROSYD) Deliverable 3.2/5,www.prosyd.org/twiki/view/Public/DeliverablePageWP3, • 2005
View 7 Excerpts
Highly Influenced

Efficient Automata-Based Assertion-Checker Synthesis of PSL Properties

2006 IEEE International High Level Design Validation and Test Workshop • 2006

The Safety Simple Subset

Haifa Verification Conference • 2005
View 1 Excerpt

Optimized Algorithms for Dynamic Verification ” , Property Based System Design ( PROSYD ) Deliverable 3

Dmitry Pidan, Sharon Keidar-Barner, Mark Moulin
Property Specification Language Reference Manual • 2004

Similar Papers

Loading similar papers…