Automated Verification with Abstract State Machines Using Multiway Decision Graphs

@inproceedings{Cerny2005AutomatedVW,
  title={Automated Verification with Abstract State Machines Using Multiway Decision Graphs},
  author={Eduard Cerny and Francisco Corella and Michel Langevin and Xiaoxin Song and Sofi{\`e}ne Tahar and Zhi-Hua Zhou},
  year={2005}
}
The presence of uninterpreted symbols in the logic means that we must distinguish between a state machine M and its abstract description D in the logic. A given abstract description D will determine a machine M for every interpretation ¢. For the purpose of hardware verification we are interested only in finite state machines (FSMs). However, an abstract description will represent infinite as well as finite state machines, since abstract sorts admit infinite interpretations. We call Abstract… CONTINUE READING
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