Atomic Vector Operations on Chip Multiprocessors

  title={Atomic Vector Operations on Chip Multiprocessors},
  author={Sanjeev Kumar and Daehyun Kim and Mikhail Smelyanskiy and Yen-Kuang Chen and Jatin Chhugani and Christopher J. Hughes and Changkyu Kim and Victor W. Lee and Anthony D. Nguyen},
  journal={2008 International Symposium on Computer Architecture},
The current trend is for processors to deliver dramatic improvements in parallel performance while only modestly improving serial performance. Parallel performance is harvested through vector/SIMD instructions as well as multithreading (through both multithreaded cores and chip multiprocessors). Vector parallelism can be more efficiently supported than multithreading, but is often harder for software to exploit. In particular, code with sparse data access patterns cannot easily utilize the… CONTINUE READING
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