At-Speed SEE Testing of RHBD Embedded SRAMs

  title={At-Speed SEE Testing of RHBD Embedded SRAMs},
  author={Ethan H. Cannon and Joseph Tostenrude and Manuel Caba{\~n}as-Holmen and Barry Meaker and Charles Neathery and Michael Carson and Roger Brees},
  journal={IEEE Transactions on Nuclear Science},
We describe a test structure architecture that allows at-speed Single Event Effects (SEE) testing on embedded memory arrays. The at-speed test structure enables identification of Multiple Cell Upsets (MCU), Multiple Bit Upsets (MBU), persistent errors and transient errors. Error Detection and Correction (EDAC) can reduce the residual error rate due to SEU by multiple orders of magnitude. Consequently, careful testing of the at-speed test structure is essential to detect and quantify the risk of… 
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  • JEDEC Standard JESD
  • 2006