Asynchronous arbiter for micro-threaded chip multiprocessors

@article{Hasasneh2007AsynchronousAF,
  title={Asynchronous arbiter for micro-threaded chip multiprocessors},
  author={Nabil Hasasneh and Ian M. Bell and Chris R. Jesshope},
  journal={Journal of Systems Architecture},
  year={2007},
  volume={53},
  pages={253-262}
}
This paper presents a scalable and partitionable asynchronous bus arbiter for use with chip multiprocessors and its corresponding pre-layout simulation results using VHDL. The arbiter exploits the advantage of a concurrency control instruction (Brk) provided by the micro-threaded microprocessor model to set the priority processor and move the circulated arbitration token to the most likely processor to issue the create instruction. This mechanism provides latency hiding during token circulation… CONTINUE READING

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