Asymptotic waveform evaluation for timing analysis

  title={Asymptotic waveform evaluation for timing analysis},
  author={Lawrence T. Pileggi and Ronald A. Rohrer},
  journal={IEEE Trans. on CAD of Integrated Circuits and Systems},
For digital system designs the propagation delays due to the physical interconnect can have a significant, even dominant, impact on performance. Timing analyzers attempt to capture the effect of the interconnect on the delay with a simplified model, typically an RC tree. For mid-frequency MOS integrated circuits the RC tree methods can predict the delay to within 10 percent of a SPICE simulation and at faster than lOOOx the speed. With continual progress in integrated circuit processing… CONTINUE READING
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