Array Processors for Viterbi Decoder

@article{Avessta2005ArrayPF,
  title={Array Processors for Viterbi Decoder},
  author={Nastooh Avessta},
  journal={2005 2nd International Symposium on Wireless Communication Systems},
  year={2005},
  pages={447-451}
}
Wireless receivers are often characterized as portable and battery operated. As such, they are bound by a tight set of constraints such as power consumption, area usage, and throughput speed. Parallel implementation of operations increases the speed of computation without an undue increase in lock frequency. Thus, high throughput is achieved without excessive power consumption. The apparent tradeoff in throughput improvement, of parallel implementation, is the larger area usage. Hence, there is… CONTINUE READING

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