Area optimized S-BOX Architecture for Advance Encryption Standards

Abstract

This paper presents an area optimized for composite field arithmetic based SubBytes transformation (Sbox) used in Advanced Encryption Standard (AES) encryption. The proposed architecture is based on precomputation technique. Implementation is proposed on FPGA using Xilinx ISE on XC3S 400-5 and results are shown in the paper. Keywords—AES, S-BOX, Sub-Byte, Encryption.

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Cite this paper

@inproceedings{Gupta2013AreaOS, title={Area optimized S-BOX Architecture for Advance Encryption Standards}, author={Nimmi Gupta and Tarun Verma}, year={2013} }