Area–Delay–Power Efficient Carry-Select Adder

@article{Mohanty2014AreaDelayPowerEC,
  title={Area–Delay–Power Efficient Carry-Select Adder},
  author={Basant K. Mohanty and Sujit Kumar Patel},
  journal={IEEE Transactions on Circuits and Systems II: Express Briefs},
  year={2014},
  volume={61},
  pages={418-422}
}
In this brief, the logic operations involved in conventional carry select adder (CSLA) and binary to excess-1 converter (BEC)-based CSLA are analyzed to study the data dependence and to identify redundant logic operations. We have eliminated all the redundant logic operations present in the conventional CSLA and proposed a new logic formulation for CSLA. In the proposed scheme, the carry select (CS) operation is scheduled before the calculation of-final-sum, which is different from the… CONTINUE READING
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