Architecture design for deblocking filter in H.264/JVT/AVC

  title={Architecture design for deblocking filter in H.264/JVT/AVC},
  author={Yu-Wen Huang and To-Wei Chen and Bing-Yu Hsieh and Tu-Chih Wang and Te-Hao Chang and Liang-Gee Chen},
This paper,presents an efficient VLSI architecture for the dehlocking filter in H.ZWIVT/AVC. We use an array of 8x4 &bit shift registers with reconligurable data path to support both horizontal filtering and vertical filtering on the same circuit (a parallel-in parallel-out reconfigurable FIR filter). Two SRAM modules are carefully organized not only for the storage of current macroblock data and adjacent block data but also for the efficient access of pixels in different blocks. Simulation… CONTINUE READING
Highly Influential
This paper has highly influenced 22 other papers. REVIEW HIGHLY INFLUENTIAL CITATIONS
Highly Cited
This paper has 139 citations. REVIEW CITATIONS


Publications citing this paper.
Showing 1-10 of 86 extracted citations

140 Citations

Citations per Year
Semantic Scholar estimates that this publication has 140 citations based on the available data.

See our FAQ for additional information.


Publications referenced by this paper.

Similar Papers

Loading similar papers…