Architecting voltage islands in core-based system-on-a-chip designs

@article{Hu2004ArchitectingVI,
  title={Architecting voltage islands in core-based system-on-a-chip designs},
  author={Jingcao Hu and Y. Shin and Nagu R. Dhanwada and R. Marculescu},
  journal={Proceedings of the 2004 International Symposium on Low Power Electronics and Design (IEEE Cat. No.04TH8758)},
  year={2004},
  pages={180-185}
}
  • Jingcao Hu, Y. Shin, +1 author R. Marculescu
  • Published 2004
  • Engineering, Computer Science
  • Proceedings of the 2004 International Symposium on Low Power Electronics and Design (IEEE Cat. No.04TH8758)
  • Voltage islands enable core-level power optimization for System-on-Chip (SoC) designs by utilizing a unique supply voltage for each core. Architecting voltage islands involves island partition creation, voltage level assignment and floorplanning. The task of island partition creation and level assignment have to be done simultaneously in a floorplanning context due to the physical constraints involved in the design process. This leads to a floorplanning problem formulation that is very… CONTINUE READING
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