Analytical Modeling of Parasitic Capacitance in Inserted-Oxide FinFETs

Abstract

An analytical model of parasitic capacitance in inserted-oxide FinFETs (iFinFETs) is proposed. A comparative study on the parasitic capacitance of contemporary multigate devices conforming to 7-nm technology node targets is presented. The proposed model is validated against 3-D Technology Computer-Aided Design (TCAD) simulations. Dependence of the iFinFET… (More)

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13 Figures and Tables