• Corpus ID: 14504167

Analytical Modeling and Reduction of Direct Tunneling Current during Behavioral Synthesis of Nanometer CMOS Circuits

@inproceedings{Mohanty2005AnalyticalMA,
  title={Analytical Modeling and Reduction of Direct Tunneling Current during Behavioral Synthesis of Nanometer CMOS Circuits},
  author={Saraju P. Mohanty and Valmiki Mukherjee and Ramakrishna Velagapudi},
  year={2005}
}
Gate oxide direct tunneling current is the major component of static power dissipation of a CMOS circuit for low-end technology, where the gate dielectric (SiO 2) thickness is very low. This paper presents a novel direct tunneling current reduction method during behavioral synthesis of nanometer CMOS circuits. We provide analytical models to calculate the direct tunneling current and the propagation delay of behavioral level components. We then characterize those components for various gate… 

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