Analytical Method for Computation of Phase-Detector Characteristic

@article{Leonov2012AnalyticalMF,
  title={Analytical Method for Computation of Phase-Detector Characteristic},
  author={Gennady A. Leonov and Nikolay V. Kuznetsov and Marat V. Yuldashev and Renat V. Yuldashev},
  journal={IEEE Transactions on Circuits and Systems II: Express Briefs},
  year={2012},
  volume={59},
  pages={633-637}
}
Discovery of undesirable hidden oscillations, which cannot be found by simulation, in models of phase-locked loop (PLL) showed the importance of development and application of analytical methods for the analysis of such models. Approaches to a rigorous nonlinear analysis of analog PLL with multiplier phase detector (classical PLL) and linear filter are discussed. An effective analytical method for computation of multiplier/mixer phase-detector characteristics is proposed. For various waveforms… 
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References

SHOWING 1-10 OF 34 REFERENCES
High-frequency Analysis of Phase-locked Loop and Phase Detector Characteristic Computation
TLDR
An analytical method for phase detector characteristics computation is suggested and new classes of phase detectors characteristics are computed.
Analytical methods for computation of phase-detector characteristics and PLL design
TLDR
An effective analytical methods for computation of phase detector characteristics are suggested and new classes of such characteristics are described for high-frequency oscillators.
Computation of Phase Detector Characteristics in Synchronization Systems
For the analysis of PLL it is necessary to consider the models of PLL in signal space and phase space [Viterbi(1966), Gardner(1966), Shakhgil’dyan & Lyakhovkin(1972)]). In this case for constructing
Nonlinear analysis of the Costas loop and phase-locked loop with squarer
This work is devoted to the nonlinear analysis of the Costas loop and phase-locked loop with squarer. By using the special asymptotical methods for analysis of high-frequency harmonic and impulse
Phase Locked Loops Design and Analysis
TLDR
The rigorous mathematical formulation of the Costas loop for the clock oscillators are obtained and the block diagram of oating PLL for the elimination of clock skew and that of frequency synthesizer is proposed.
Extraction of instantaneous and RMS sinusoidal jitter using an analytic signal method
TLDR
Results of Matlab simulations validate the performance of the new method for measuring jitter, and it is further validated by comparing experimental sinusoidal jitter results with those of a time interval analyzer.
Equations of Phase-Locked Loops: Dynamics on Circle, Torus and Cylinder
Phase-Locked Loops (PLLs) are electronic systems that can be used as a synchronized oscillator, a driver or multiplier of frequency, a modulator or demodulator and as an amplifier of phase modulated
Phase-locked loops: a control centric tutorial
  • D. Abramovitch
  • Computer Science
    Proceedings of the 2002 American Control Conference (IEEE Cat. No.CH37301)
  • 2002
Presents a tutorial on phase-locked loops from a control systems perspective. It starts with an introduction of the loop as a feedback control problem, with both the similarities and differences to
Phase Lock Loops and Frequency Synthesis
TLDR
This chapter discusses PLLs and Digital Frequency Synthesizers, which has applications in Frequency Synthesis and Noise and Time Jitter, and basic Equations of the P LLs, which describe the construction of these systems.
Analysis and Design of Computer Architecture Circuits with Controllable Delay Line
TLDR
In the work it is mathematically strictly shown that RC-chain can be used as a controllable delay line for different problems of circuit engineering if the chain is sequentially connected with hysteretic relay.
...
1
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3
4
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