Analytical Method for Computation of Phase-Detector Characteristic

@article{Leonov2012AnalyticalMF,
  title={Analytical Method for Computation of Phase-Detector Characteristic},
  author={G. Leonov and N. Kuznetsov and M. Yuldashev and R. Yuldashev},
  journal={IEEE Transactions on Circuits and Systems II: Express Briefs},
  year={2012},
  volume={59},
  pages={633-637}
}
  • G. Leonov, N. Kuznetsov, +1 author R. Yuldashev
  • Published 2012
  • Computer Science
  • IEEE Transactions on Circuits and Systems II: Express Briefs
  • Discovery of undesirable hidden oscillations, which cannot be found by simulation, in models of phase-locked loop (PLL) showed the importance of development and application of analytical methods for the analysis of such models. Approaches to a rigorous nonlinear analysis of analog PLL with multiplier phase detector (classical PLL) and linear filter are discussed. An effective analytical method for computation of multiplier/mixer phase-detector characteristics is proposed. For various waveforms… CONTINUE READING
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    References

    SHOWING 1-10 OF 34 REFERENCES
    Analytical methods for computation of phase-detector characteristics and PLL design
    • 16
    Nonlinear analysis of the Costas loop and phase-locked loop with squarer
    • M. SeledzhiS., Draft
    • 2012
    • 5
    • PDF
    Phase Locked Loops Design and Analysis
    • 13
    • PDF
    Extraction of instantaneous and RMS sinusoidal jitter using an analytic signal method
    • 52
    • PDF
    Phase-locked loops: a control centric tutorial
    • D. Abramovitch
    • Computer Science
    • Proceedings of the 2002 American Control Conference (IEEE Cat. No.CH37301)
    • 2002
    • 155
    • PDF
    Phase Lock Loops and Frequency Synthesis
    • 139
    • PDF
    Analysis and Design of Computer Architecture Circuits with Controllable Delay Line
    • 11
    • PDF