Analysis of high-performance floating-point arithmetic on FPGAs

@article{Govindu2004AnalysisOH,
  title={Analysis of high-performance floating-point arithmetic on FPGAs},
  author={Gokul Govindu and Ling Zhuo and Seonil B. Choi and Viktor K. Prasanna},
  journal={18th International Parallel and Distributed Processing Symposium, 2004. Proceedings.},
  year={2004},
  pages={149-}
}
Summary form only given. FPGAs are increasingly being used in the high performance and scientific computing community to implement floating-point based hardware accelerators. We analyze the floating-point multiplier and adder/subtractor units by considering the number of pipeline stages of the units as a parameter and use throughput/area as the metric. We… CONTINUE READING