Analysis of Dynamic Faults in Embedded-SRAMs: Implications for Memory Test

This paper presents the results of resistive-open defect insertion in different locations of Infineon 0.13 μm embedded-SRAM with the main purpose of verifying the presence of dynamic faults. This study is based on the injection of resistive defects as their presence in VDSM technologies is more and more frequent. Electrical simulations have been performed… CONTINUE READING



Citations per Year

Citation Velocity: 9

Averaging 9 citations per year over the last 3 years.

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