Analysis and Design of RF CMOS Attenuators

  title={Analysis and Design of RF CMOS Attenuators},
  author={Halit Dogan and Richard E. Meyer and A. M. Niknejad},
  journal={IEEE Journal of Solid-State Circuits},
Attenuators are analyzed for their minimum Insertion Loss (IL), maximum attenuation and source-load matching performance. These results are used to make trade-offs in the design of a CMOS attenuator with wide dynamic range, designed and fabricated in a 0.13 mum CMOS process. The design employs two non-identical cascaded T-stages that are activated consecutively to improve linearity. The design operates in the frequency band of DC-2.5 GHz with 0.9-3.5 dB insertion loss and 42 dB maximum… CONTINUE READING
Highly Cited
This paper has 33 citations. REVIEW CITATIONS


Publications citing this paper.
Showing 1-10 of 21 extracted citations


Publications referenced by this paper.
Showing 1-10 of 15 references

Operation and Modeling of the MOS Transistor

  • Y. Tsividis
  • New York: McGraw-Hill,
  • 1999

Six terminal MOSFET’s: Modeling and applications in highly linear, electronically tunable resistors

  • K. Vavelidis, Y. Tsividis, F. O. Eynde, Y. Papananos
  • IEEE J. Solid-State Circuits, vol. 32, no. 1, pp…
  • 1997

Simple “reconciliation” MOSFET model valid in all regions

  • Y. Tsividis, K. Suyama, K. Vavelidis
  • Electron. Lett., pp. 506–508, Mar. 1995.
  • 1995

The bootstrapped gate FET (BGFET)—A new control transistor

  • R. Bayruns
  • IEEE GaAs IC Symp. Dig., 1995, pp. 136–139.
  • 1995
1 Excerpt

Analysis and Design of Analog Integrated Circuits, 3rd ed

  • R. G. Meyer, P. R. Gray
  • 1993

Similar Papers

Loading similar papers…