Analog IC Design in Ultra-Thin Oxide CMOS Technologies With Significant Direct Tunneling-Induced Gate Current

@article{Bohannon2011AnalogID,
  title={Analog IC Design in Ultra-Thin Oxide CMOS Technologies With Significant Direct Tunneling-Induced Gate Current},
  author={Eric Bohannon and Clyde Washburn and Ponnathpur R. Mukund},
  journal={IEEE Transactions on Circuits and Systems I: Regular Papers},
  year={2011},
  volume={58},
  pages={645-653}
}
Recent studies have shown that manufacturing costs and design complexities may delay the widespread use of high-κ/metal gate nanoscale CMOS technologies. This implies that traditional (non-high-κ/non-metal gate) ultra-thin oxide technologies will remain active due to economic factors for longer periods of time. Direct tunneling is a significant source of MOSFET gate current in these technologies. Its presence fundamentally alters MOSFET functionality by invalidating the simplifying design… CONTINUE READING

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