Analog IC Design in Nanometer CMOS Technologies

  title={Analog IC Design in Nanometer CMOS Technologies},
  author={Willy M. C. Sansen},
  journal={2009 22nd International Conference on VLSI Design},
  • W. Sansen
  • Published 2009
  • Materials Science, Computer Science
  • 2009 22nd International Conference on VLSI Design
In nanometer CMOS technologies, several new effects emerge, such as velocity saturation and gate leakage currents. As a result the transconductance and speed are both limited by velocity saturation. Also noise and mismatch are affected as a result of the thinner gate oxides used. Moreover the supply voltage is reduced to values below 1 Volt, creating new challenges for analog circuit design. This presentation provides a review of the modifications in model parameters, including noise and… Expand
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