An ultra-low-power voltage-mode asynchronous WTA-LTA circuit

Abstract

This paper presents an asynchronous mixed-signal WTA-LTA circuit conceived to carry out local minimummaximum indexing in massively parallel image processing arrays. The hardware is focused on energy-efficient operation. We describe a realization for the standard CMOS base process of a commercial 3-D TSV stack featuring a power consumption of only 20pW per elementary cell at 30fps. The proposed block is also capable of resolving small voltage differences without requiring any external reference. This leads to a hit percentage greater than 90% even when taking into account global process variations and mismatch conditions.

DOI: 10.1109/ISCAS.2013.6572218

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Cite this paper

@inproceedings{FernandezBerni2013AnUV, title={An ultra-low-power voltage-mode asynchronous WTA-LTA circuit}, author={Jorge Fernandez-Berni and Ricardo Carmona-Gal{\'a}n and {\'A}ngel Rodr{\'i}guez-V{\'a}zquez}, booktitle={ISCAS}, year={2013} }