An ultra low power 3D integrated intra-chip silicon electronic-photonic link

@article{Timurdogan2015AnUL,
  title={An ultra low power 3D integrated intra-chip silicon electronic-photonic link},
  author={Erman Timurdogan and Zhan Su and Krishna T. Settaluri and Sen Lin and Sajjad Moazeni and Chen Sun and Gerald Leake and Douglas D. Coolbaugh and Benjamin R. Moss and Michele Moresco and V. Stojanovic and Michael Robert Watts},
  journal={2015 Optical Fiber Communications Conference and Exhibition (OFC)},
  year={2015},
  pages={1-3}
}
A record low energy (250fJ/bit) intra-chip electronic-photonic link is demonstrated at 5Gb/s on a 3D-integrated wafer using through-oxide-vias (1.45fF-per-via) for the first time. The receiver sensitivity was -19.3dBm and the on-chip laser energy was 6fJ/bit. 
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