An integrated 20-bit 33/5M events/s AER sensor interface with 10ns time-stamping and hardware-accelerated event pre-processing

@article{Hofstatter2009AnI2,
  title={An integrated 20-bit 33/5M events/s AER sensor interface with 10ns time-stamping and hardware-accelerated event pre-processing},
  author={Michael Hofstatter and Peter Schon and Christoph Posch},
  journal={2009 IEEE Biomedical Circuits and Systems Conference},
  year={2009},
  pages={257-260}
}
This paper presents a custom data bridge that interfaces the continuous-time world of asynchronous address-events (AER) to the realm of conventional digital data processing. The main focus in the design of the interface was on precisely maintaining the inherent timing information of AER sensor data while providing robust peak-rate handling, DMA functionality and a novel event-rate dependent system control mechanism. The sensor interface can be integrated with standard CMOS logic in an AER… CONTINUE READING
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